Fabricating transistors without those pesky junctions and dopants

Now this looks interesting. EETimes relates some fascinating research at the Tyndall National Institute in Cork, Ireland: The current flow in nanowires can be pinched off by a simple, conductive nanoscale surrounding structure. According to the EETimes article:

The breakthrough is based on the deployment of a control gate around a silicon wire that measures just a few dozen atoms in diameter. The gate can be used the squeeze the electron channel to nothing without the use of junctions or doping. The development, which could simplify manufacturing of transistors at around the 10-nanometer stage, was created a by a team led by Professor Jean-Pierre Colinge and a paper on the development has been published in Nature Nanotechnology.
It simplifies the production of transistors which also have a near-ideal sub-threshold slope, extremely low leakage currents and less degradation of mobility with gate voltage and temperature than classical transistors, the researchers have claimed. Nonetheless such device can be made to have CMOS compatibility...
"We have designed and fabricated the world s first junctionless transistor that significantly reduces power consumption and greatly simplifies the fabrication process of silicon chips," declared Tyndall's Professor Colinge...

Between these devices, graphene technology and memristors, it would seem that a whole new chapter in integrated-circuit fabrication is in store for the next few years. Somewhere, Gordon Moore smiles.